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An ULV PWM CMOS Imager With Adaptive-Multiple-Sampling Linear Response, HDR Imaging, and Energy Harvesting.

Authors :
Chiou, Albert Yen-Chih
Hsieh, Chih-Cheng
Source :
IEEE Journal of Solid-State Circuits; Jan2019, Vol. 54 Issue 1, p298-306, 9p
Publication Year :
2019

Abstract

This paper presents an ultra-low-voltage (ULV) $300\times 200$ pixel pulsewidth-modulation (PWM) CMOS imager with monitoring and capturing for Internet-of-Things (IoT) and artificial intelligent (AI) applications, fabricated in the CMOS 0.18- $\mu \text{m}$ standard process technology. In always-ON monitoring operation, the imager provides high dynamic range (HDR) and energy harvesting (EH) modes for event detection and energy collection, respectively. In low-power image capturing operation, the imager provides a linear-response (LR) mode for object identification and recording. In the LR mode, the proposed ULV PWM pixel with threshold variation cancellation (TVC) achieves a non-linearity of +0.36/āˆ’0.29% and a fixed-pattern noise (FPN) of 0.159%. With the proposed pixel-wise adaptive-multiple-sampling (AMS) scheme and the corresponding $n$ -time multiple sampling using dual-slope ramping (DSR) reference, the 0.4-V-operated PWM pixel achieves a total noise of 9.42eāˆ’ at 4-time AMS operation. The achieved peak signal-to-noise ratio (PSNR) and dynamic range (DR) are 60.1 dB in the LR mode and 141 dB in the HDR mode, respectively, and the harvested power is 15.5 $\mu \text{W}$ at 60 klx in the EH mode. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189200
Volume :
54
Issue :
1
Database :
Complementary Index
Journal :
IEEE Journal of Solid-State Circuits
Publication Type :
Academic Journal
Accession number :
134230877
Full Text :
https://doi.org/10.1109/JSSC.2018.2870559