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Synergistic combination of amorphous indium oxide with tantalum pentoxide for efficient electron transport in low-power electronics.

Authors :
Park, Song Yi
Heo, Jungwoo
Yoon, Yung Jin
Kim, Jae Won
Jang, Hyungsu
Walker, Bright
Kim, Jin Young
Source :
Journal of Materials Chemistry C; 4/21/2019, Vol. 7 Issue 15, p4559-4566, 8p
Publication Year :
2019

Abstract

Among transparent metal oxide semiconductors, systems based on indium oxide currently deliver the best combination of electronic characteristics and optical transmittance, outperforming even the well-established polycrystalline silicon devices. Indium oxide has the unique property that uniform, amorphous films yield superior electronic properties compared to microcrystalline films; for this reason, Ga and Zn hetero-elements are usually added to disrupt crystallization and result in uniformly disordered films. However, dopants have a general tendency to increase the complexity and decrease the mobility of semiconductors and their addition might well be avoided if high-quality, amorphous In<subscript>2</subscript>O<subscript>3</subscript> films could be grown without them. In this work, we show that this problem can be resolved by exploiting a synergistic interaction between solution-processed indium oxide (In<subscript>2</subscript>O<subscript>3</subscript>) and underlying tantalum pentoxide (Ta<subscript>2</subscript>O<subscript>5</subscript>) dielectric films. We observed that amorphous Ta<subscript>2</subscript>O<subscript>5</subscript> inhibits crystallization of In<subscript>2</subscript>O<subscript>3</subscript> leading to high-quality amorphous thin films with reduced oxygen deficiencies at the semiconductor/dielectric interface. Transparent Ta<subscript>2</subscript>O<subscript>5</subscript>/In<subscript>2</subscript>O<subscript>3</subscript> TFTs with very low operating voltages were demonstrated with effective field-effect mobilities of up to 23.1 cm<superscript>2</superscript> V<superscript>−1</superscript> s<superscript>−1</superscript> at only 3 V drain–source voltage (V<subscript>DS</subscript>) using this approach. Additionally, the suppressed carrier density arising from reduced oxygen deficiencies reduced the drain current at 0 V gate bias (I<subscript>0</subscript>) by six orders of magnitude from 0.25 mA to 10.8 nA, compared to a SiO<subscript>2</subscript> reference device. These results highlight the importance of considering an underlying dielectric layer to maximize device performance. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
20507526
Volume :
7
Issue :
15
Database :
Complementary Index
Journal :
Journal of Materials Chemistry C
Publication Type :
Academic Journal
Accession number :
135839318
Full Text :
https://doi.org/10.1039/c9tc00054b