Cite
Improved PBTI Reliability in Junction-Less FET Fabricated at Low Thermal Budget for 3-D Sequential Integration.
MLA
Wu, Zhicheng, et al. “Improved PBTI Reliability in Junction-Less FET Fabricated at Low Thermal Budget for 3-D Sequential Integration.” IEEE Transactions on Device & Materials Reliability, vol. 19, no. 2, June 2019, pp. 262–67. EBSCOhost, https://doi.org/10.1109/TDMR.2019.2906843.
APA
Wu, Z., Franco, J., Vandooren, A., Kaczer, B., Roussel, P., Rzepa, G., Grasser, T., Linten, D., & Groeseneken, G. (2019). Improved PBTI Reliability in Junction-Less FET Fabricated at Low Thermal Budget for 3-D Sequential Integration. IEEE Transactions on Device & Materials Reliability, 19(2), 262–267. https://doi.org/10.1109/TDMR.2019.2906843
Chicago
Wu, Zhicheng, Jacopo Franco, Anne Vandooren, Ben Kaczer, Philippe Roussel, Gerhard Rzepa, Tibor Grasser, Dimitri Linten, and Guido Groeseneken. 2019. “Improved PBTI Reliability in Junction-Less FET Fabricated at Low Thermal Budget for 3-D Sequential Integration.” IEEE Transactions on Device & Materials Reliability 19 (2): 262–67. doi:10.1109/TDMR.2019.2906843.