A Novel Double-RESURF SOI Lateral TIGBT With Self-Biased nMOS for Improved ${V}_{\text{CE(sat)}}$ – ${E}_{\text{off}}$ Tradeoff Relationship.

A novel double-reduced surface field (RESURF) silicon-on-insulator (SOI) lateral trench insulated-gate bipolar transistor (LTIGBT) with self-biased nMOS is proposed and investigated by simulation. During the turn-on transient, the self-biased nMOS is turned-off, and the p-top region is floating, and therefore the conductivity modulation in the drift region on the emitter side can be enhanced to achieve a low on-state voltage (${V}_{\textsf {CE(sat)}}$). During the turn-off transient, the self-biased nMOS is turned on, and the p-top region is connected to the emitter, which effectively reduces its turn-off loss (${E}_{ \mathrm{\scriptscriptstyle OFF}}$). As a result, the proposed LTIGBT realizes superior ${V}_{\textsf {CE(sat)}}$ – $E_{ \mathrm{\scriptscriptstyle OFF}}$ tradeoff relationship than both the conventional SOI trench-gate lateral insulated-gate bipolar transistor (LIGBT) (LTIGBT-A) and the double-RESURF SOI trench-gate LIGBT (LTIGBT-B). Simulation results reveal that, with the identical ${E}_{ \mathrm{\scriptscriptstyle OFF}}$ of 0.25 mJ/cm2, ${V}_{\textsf {CE(sat)}}$ of the proposed LTIGBT is 1.08 V, which is 11.4% and 32.5% lower than those of LTIGBT-A and LTIGBT-B, respectively; with the identical ${V}_{\textsf {CE(sat)}}$ of 1.1 V, ${E}_{ \mathrm{\scriptscriptstyle OFF}}$ of the proposed one is 0.19 mJ/cm $^{\textsf {2}}$ , which is 70% and 89% lower than the other two, respectively. Furthermore, the proposed device exhibits a lower saturation current. [ABSTRACT FROM AUTHOR]