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90 Gbit s 0.5 W decision circuit using InP InGaAs double heterojunction bipolar transistors.
- Source :
- Electronics Letters (Institution of Engineering & Technology); 8/5/2004, Vol. 40 Issue 16, p1020-1021, 2p
- Publication Year :
- 2004
-
Abstract
- A high-speed low-power decision circuit using InP/InGaAs double- heterojunction bipolar transistors (DIIBTs) has been successfully designed and fabricated. The DIIBTs exhibit a cutoff frequency fr and maximum oscillation frequency f<subscript>max</subscript> of 232 and 360GHz, respectively, at a collector current density of 2.5 mA/μm<superscript>2</superscript>. To boost the operating speed, a novel-master slave D-type flip-flop (MS-DFF) was used. Up to 90 Gbit/s operation was achieved with low power consumption of 0.5 W. These results demonstrate that InP-based DHBTs are attractive for making ultra-high-performance ICs for future optical communications systems operating at bit rates of 100 Gbit/s or more. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00135194
- Volume :
- 40
- Issue :
- 16
- Database :
- Complementary Index
- Journal :
- Electronics Letters (Institution of Engineering & Technology)
- Publication Type :
- Academic Journal
- Accession number :
- 14148009
- Full Text :
- https://doi.org/10.1049/el:20045280