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A Switched-Capacitor DC-DC Converter Powering an LC Oscillator to Achieve 85% System Peak Power Efficiency and −65dBc Spurious Tones.

Authors :
Urso, Alessandro
Chen, Yue
Staszewski, Robert Bogdan
Dijkhuis, Johan F.
Stanzione, Stefano
Liu, Yao-Hong
Serdijn, Wouter A.
Babaie, Masoud
Source :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers; Nov2020, Vol. 67 Issue 11, p3764-3777, 14p
Publication Year :
2020

Abstract

In this paper, we propose a new scheme to directly power a 4.9–5.6GHz LC oscillator from a recursive switched-capacitor DC-DC converter. A finite-state machine is integrated to automatically adjust the conversion ratio and switching frequency of the converter such that its DC output voltage is within ±5% of the desired 1V across input voltage range 1.3–2.2V and < 2mA load current conditions. A gate-driver circuit is embedded in each switch of the converter to guarantee constant on-resistance across PVT variations without sacrificing device reliability. Furthermore, a spur reduction block (SRB) is embedded in the oscillator to suppress the ripple induced spurs by stabilizing its tail current. Both the converter and the oscillator are implemented in 40-nm CMOS technology. The measured peak power efficiency of the converter is 87%, while its spot noise is < 1.5nV/ $\sqrt {\mathrm{ Hz}}$ , which does not degrade the phase noise of the oscillator. The SRB suppresses the spur to < −65dBc under the 30mVpp ripple of the converter. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
15498328
Volume :
67
Issue :
11
Database :
Complementary Index
Journal :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers
Publication Type :
Periodical
Accession number :
146782440
Full Text :
https://doi.org/10.1109/TCSI.2020.3012106