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МЕТОД ЗМЕНШЕННЯ КІЛЬКОСТІ ЕЛЕМЕНТІВ LUT В СХЕМІ КОМПОЗИЦІЙНОГО МІКРОПРОГРАМНОГО ПРИСТРОЮ УПРАВЛІННЯ З ПЕРЕТВОРЮВАЧАМИ АДРЕСИ.

Authors :
Баркалов, О. О.
Тітаренко, Л. О.
Головін, О. М.
Матвієнко, О. В.
Source :
Science-Based Technologies; 2021, Vol. 49 Issue 1, p3-12, 10p
Publication Year :
2021

Abstract

In advance digital systems, implemented using various VLSI circuits, an important issue remains to reduce the area of the circuit, which is occupied by the control device, and, consequently, reduce the delay time and the amount of power consumption. As a rule, reducing the area of the circuit of the control device allows improving its other characteristics. Methods for solving this problem to some extent depend on the features of the implemented control algorithm and element basis. The article proposes a method for reducing the number of LUT (Look-Up-Table) elements in the scheme of a composition microprogram control unit (CMCU), based on converting the addresses of the outputs of linear operator circuits (LOC) into output codes. This transformation reduces the number of inputs of the addressing scheme of microinstructions, which is especially important when implementing the circuit of the control device on the FPGA basis due to the small number of inputs of elements of the tabular type LUT. The outputs of the LOC are encoded as elements of some classes of partitioning the set of outputs. This approach allows you to move from a multi-level microinstruction addressing scheme to a two-level one. The control memory and the address conversion block are implemented on embedded memory blocks. The proposed method is an adaptation of the method of double coding of states of Miles automata to the features of CMCU. The method is advisable to use if the microinstruction addressing unit is represented by a multi-level scheme. This is possible if the number of arguments in the memory excitation functions exceeds the number of LUT inputs. If the bit width of the microinstruction address exceeds the number of LUT inputs, then the address converter block circuit is also multilevel. Analysis of standard automata from the library and the Virtex 7 basis showed that this method can be applied to 68% of the library elements. The article considers an example of the synthesis of a CMCU circuit using the proposed method. [ABSTRACT FROM AUTHOR]

Details

Language :
Ukrainian
ISSN :
20750781
Volume :
49
Issue :
1
Database :
Complementary Index
Journal :
Science-Based Technologies
Publication Type :
Academic Journal
Accession number :
150154863
Full Text :
https://doi.org/10.18372/2310-5461.49.15142