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HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions.
- Source :
- IEEE Transactions on Circuits & Systems. Part II: Express Briefs; Sep2021, Vol. 68 Issue 9, p3158-3162, 5p
- Publication Year :
- 2021
-
Abstract
- The evolution of computer algorithms and micro-architectures continuously leads to novel applications and solutions that explore modern computers’ potential. A drawback of this development is the rising complexity of hardware-oriented tests during software development. This brief proposes Hambug, a method to support developers during software testing of parallel applications in CPU-FPGA environments. The main component is a run-time memory analyzer that employs shared channels. Thus, Hambug enables memory analysis of parallel applications without influencing the CPU using a hardware-based debug module. Experimental results indicate that this method presents lower slowdown compared with modern dynamic analysis tools. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 15497747
- Volume :
- 68
- Issue :
- 9
- Database :
- Complementary Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part II: Express Briefs
- Publication Type :
- Academic Journal
- Accession number :
- 153301073
- Full Text :
- https://doi.org/10.1109/TCSII.2021.3093985