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Enabling real-time object detection on low cost FPGAs.

Authors :
Jain, Vikram
Jadhav, Ninad
Verhelst, Marian
Source :
Journal of Real-Time Image Processing; Feb2022, Vol. 19 Issue 1, p217-229, 13p
Publication Year :
2022

Abstract

Object detection using convolutional neural networks (CNNs) has garnered a lot of interest due to their high performance capability. Yet, the large number of operations and memory fetches to both on-chip and external memory needed for such CNNs result in high latency and power dissipation on resource constrained edge devices, hence impeding their real-time operation from a battery supply. In this paper, a resource and cost efficient hardware accelerator for CNN is implemented on an FPGA. Using an existing metric DSP efficiency and a new metric Cost efficiency as the primary optimization variables, exploration of algorithms and hardware using a design space exploration tool, called ZigZag, is undertaken. An optimized architecture is implemented on a Xilinx XC7Z035 FPGA and tiny-YOLOv2 is mapped to demonstrate the real-time object detection application. Compared to the state-of-the-art (SotA), the implementation results shows that the hardware achieves the best DSP efficiency at 90% and Cost efficiency at 0.146. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
18618200
Volume :
19
Issue :
1
Database :
Complementary Index
Journal :
Journal of Real-Time Image Processing
Publication Type :
Academic Journal
Accession number :
154994166
Full Text :
https://doi.org/10.1007/s11554-021-01177-w