Design and analysis of noninverting single-spiral CMOS Wilkinson power dividers and their quadrature couplers and baluns.

We present the design and analysis of noninverting single-spiral Ka-band (26.5–40 GHz) CMOS Wilkinson power dividers and their deriving quadrature couplers (QCs) and baluns. For the power dividers, a parallel capacitor is included at the input port (port 1) for input matching, and a parallel RC network is connected between the output ports (ports 2 and 3) for input matching and isolation. Noninverting single-spiral structure with transmission-line (TL) length of about λ/12 is adopted to achieve miniature area and small amplitude imbalance (AI) and phase difference (PD). To realize QC and balun, negative/positive phase-shift TLs with phase-shift of − 45°/45° and − 90°/90°, respectively, can be included at ports 2/3 of the power divider. Two power dividers and their deriving two QCs and two baluns are designed and implemented. Prominent result is obtained. For example, the miniature QC achieves excellent S₁₁ of − 13.5 dB, S₂₂ of − 14.5 dB, S₃₃ of − 19.4 dB, S₃₂ of − 10.5 dB, S₂₁ of − 4.713 dB, and S₃₁ of − 4.731 dB at 28 GHz. The corresponding AI and PD are 0.018 dB and − 0.1°, respectively. Moreover, S₁₁ is smaller than − 10 dB from 10.4 GHz to over 50 GHz, corresponding to a fractional bandwidth (FBW) larger than 141.4%. The QC occupies a normalized chip area of 6.1 × 10^–4 λ₀², one of the smallest normalized chip areas ever reported for millimeter-wave QCs. [ABSTRACT FROM AUTHOR]