Back to Search
Start Over
A multi-octave microwave 6-bit true time delay with low amplitude and delay variation in 65 nm CMOS.
- Source :
- International Journal of Microwave & Wireless Technologies; May2022, Vol. 14 Issue 4, p407-416, 10p
- Publication Year :
- 2022
-
Abstract
- In this paper, we describe the design, layout, and performance of a 6-bit TTD (true time delay) chip operating over the entire band of 2–18 GHz. The 1.15 mm<superscript>2</superscript> chip is implemented using TSMC foundry 65 nm technology. The least significant bit is 1 ps. The design is based on the concept of all-pass network with some modifications intended to reduce the number of unit cells. Thus, the first three bits are implemented in a single delay cell. A peaking buffer amplifier between bit 4 and bit 5 is used for impedance matching and partial compensation of the insertion loss slope. The rms delay error of the TTD is <1 ps over most of the frequency band and insertion loss is between 2.5 and 6.3 dB for all 64 states. [ABSTRACT FROM AUTHOR]
- Subjects :
- INSERTION loss (Telecommunication)
IMPEDANCE matching
UNIT cell
MICROWAVES
Subjects
Details
- Language :
- English
- ISSN :
- 17590787
- Volume :
- 14
- Issue :
- 4
- Database :
- Complementary Index
- Journal :
- International Journal of Microwave & Wireless Technologies
- Publication Type :
- Academic Journal
- Accession number :
- 156231972
- Full Text :
- https://doi.org/10.1017/S1759078721000477