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Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor.
- Source :
- IEEE Journal of Solid-State Circuits; Jan2005, Vol. 40 Issue 1, p28-35, 8p, 11 Black and White Photographs, 8 Diagrams, 1 Chart, 5 Graphs
- Publication Year :
- 2005
-
Abstract
- High-performance and low-power microprocessors are key to PDA applications. In this paper, a dynamic voltage and frequency management (DVFM) scheme with leakage power compensation effect is introduced in a microprocessor with 128-bit wideband 64-Mb embedded DRAM. The DVFM scheme autonomously controls clock frequency from 8 to 123 MHz in steps of 0.5 MHz and also adaptively controls supply voltage from 0.9 to 1.6 V in steps of S mV, achieving 82% power reduction in Personal Information Management scheduler application and 40% power reduction in MPEG4 movie playback. This low-power embedded microprocessor, fabricated with 0.18-µm CMOS embedded DRAM technology, enables high-performance operations such as audio and video applications. As process technology shrinks, this adaptive leakage power compensation scheme will become more important in realizing high-performance and low-power mobile consumer applications. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189200
- Volume :
- 40
- Issue :
- 1
- Database :
- Complementary Index
- Journal :
- IEEE Journal of Solid-State Circuits
- Publication Type :
- Academic Journal
- Accession number :
- 15752497
- Full Text :
- https://doi.org/10.1109/JSSC.2004.838021