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A Don’t-Care-Based Approach to Reducing the Multiplicative Complexity in Logic Networks.
- Source :
- IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Nov2022, Vol. 41 Issue 11, p4821-4825, 5p
- Publication Year :
- 2022
-
Abstract
- Reducing the number of AND gates in logic networks benefits the applications in cryptography, security, and quantum computing. This work proposes a don’t-care-based (DC-based) approach to reduce the number of AND gates further in the well-optimized network. Furthermore, this work also proposes an enhanced synthesis flow by integrating our approach with the state-of-the-art. The experimental results show that our approach can further reduce up to 25% of the number of AND gates in the network. For the experiments about the enhanced synthesis flow, we achieve a speedup of almost $10\times $ on average for the cryptography benchmarks while having competitive results as compared to the flow in the state-of-the-art. [ABSTRACT FROM AUTHOR]
- Subjects :
- LOGIC circuits
QUANTUM computing
LOGIC
CRYPTOGRAPHY
Subjects
Details
- Language :
- English
- ISSN :
- 02780070
- Volume :
- 41
- Issue :
- 11
- Database :
- Complementary Index
- Journal :
- IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
- Publication Type :
- Academic Journal
- Accession number :
- 160652654
- Full Text :
- https://doi.org/10.1109/TCAD.2022.3147444