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A 3.83–5.55 GHz high frequency resolution DCO with optimized switched‐capacitor ladder and low‐coupled eight‐shaped transformer.

Authors :
Zou, Wei
Li, Lei
Cheng, Zhengwang
Zhang, Li
Wang, Mei
Ma, Xinguo
Zou, Xuecheng
Source :
International Journal of Circuit Theory & Applications; Dec2023, Vol. 51 Issue 12, p5555-5569, 15p
Publication Year :
2023

Abstract

Summary: A high frequency resolution digitally controlled oscillator (DCO) is proposed for wireless transceivers, in which the scheme adopts an optimized cascaded differential switched‐capacitor (SC) ladder and a low‐coupled eight‐shaped transformer. The frequency resolution is further improved by the low electromagnetic coupling effect between the primary and secondary coils of the on‐chip transformer, thus reducing quantization noise and phase noise. An eight‐shaped transformer designed using two coils cross‐connected each other is adopted to reduce the magnetic coupling and frequency pulling. The proposed DCO is implemented in a TSMC 180‐nm CMOS process, and a tuning range of 36.7% from 3.83 to 5.55 GHz with a frequency resolution of 17 kHz is achieved. The phase noise is −120.29 dBc/Hz at 1 MHz offset from the 3.83 GHz carrier frequency. The DCO consumes 9.26 mA from a 1.8 V supply, while the figure of merit with tuning range is −191 dBc/Hz. The chip size is 0.294 mm2. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00989886
Volume :
51
Issue :
12
Database :
Complementary Index
Journal :
International Journal of Circuit Theory & Applications
Publication Type :
Academic Journal
Accession number :
174030652
Full Text :
https://doi.org/10.1002/cta.3735