A Survey of High Level Synthesis Based Hardware Security Approaches for Reusable IP Cores [Feature].

MLA

Anshul, Aditya, and Anirban Sengupta. “A Survey of High Level Synthesis Based Hardware Security Approaches for Reusable IP Cores [Feature].” IEEE Circuits & Systems Magazine, vol. 23, no. 4, Oct. 2023, pp. 44–62. EBSCOhost, https://doi.org/10.1109/MCAS.2023.3325607.

APA

Anshul, A., & Sengupta, A. (2023). A Survey of High Level Synthesis Based Hardware Security Approaches for Reusable IP Cores [Feature]. IEEE Circuits & Systems Magazine, 23(4), 44–62. https://doi.org/10.1109/MCAS.2023.3325607

Chicago

Anshul, Aditya, and Anirban Sengupta. 2023. “A Survey of High Level Synthesis Based Hardware Security Approaches for Reusable IP Cores [Feature].” IEEE Circuits & Systems Magazine 23 (4): 44–62. doi:10.1109/MCAS.2023.3325607.