Epitaxial Growth of Graphene on SiC by Thermal Shock Annealing Within Seconds.

The direct epitaxial growth of graphene on semi‐insulating SiC presents significant potential for a variety of technologically important applications, including next‐generation electronics, photonics, and quantum metrology. However, this approach also poses a competitive disadvantage in terms of quality and cost, primarily due to the uncontrollable and time‐consuming nature of the annealing process. Herein, a thermal shock annealing (TSA) method is reported that enables kinetics‐controlled epitaxial growth of graphene on SiC within 10 s, which efficiently fulfills the requirements for producing high‐quality, few‐layer, and low‐cost graphene on SiC. The epitaxial graphene (EG) grown on both β‐SiC nanoparticles (SiC@EG NPs) and centimeter‐scale α‐SiC wafer (EG/SiC) exhibits mono‐ or bi‐layer features with negligible structural defects. Moreover, the findings indicate that the TSA method can efficiently mitigate the persistent issue of step bunching conundrum and improve the flatness of EG/SiC. As an application demonstration, the significant enhancement of surface‐enhanced infrared absorption (SEIRA) by SiC@EG NPs is exhibited. The graphene plasmon arising on SiC@EG NPs enables SEIRA detection sensitivity of up to a monolayer of p‐nitrobenzenethiol (p‐NTP). Consequently, the precise regulation and comprehensive comprehension of TSA afford an exceedingly desirable approach to produce cost‐effective, high‐quality EG growth on SiC for diverse emerging application scenarios. [ABSTRACT FROM AUTHOR]