The nonlinear correction of the high-speed OAmps based on split-length CMOS and JFet input transistors.

New circuit techniques for increasing the performance of OAmps on Split-Length transistors in the input stage (IS) are considered. A promising architecture of high-speed micropower OAmps, which allows increasing SR by 1-2 orders of the magnitude, is proposed in the article. The computer simulation results of the input stages throughput characteristics and study of the OAmp Slew Rate in Cadence OrCAD 16.6 environment on low-temperature models of AGAMC_2.1 transistors (JSC "Integral", Minsk) are presented, which confirm a significant increase in Slew Rate without increasing power consumption in static mode. The developed architecture of the high-speed OAmp is also promising for implementation on wide-gap semiconductors (GaAs, GaN, SiC, Si technologies) and for designing high-speed ADC drivers operating in harsh operating conditions (exposure to penetrating radiation and low temperatures). [ABSTRACT FROM AUTHOR]