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Microstructure of electronic-grade polycrystalline silicon core-matrix interface.
- Source :
- Journal of Advanced Dielectrics; Jun2024, Vol. 14 Issue 3, p1-7, 7p
- Publication Year :
- 2024
-
Abstract
- This paper focuses on the problems encountered in the production process of electronic-grade polycrystalline silicon. It points out that the characterization of electronic-grade polycrystalline silicon is mainly concentrated at the macroscopic scale, with relatively less research at the mesoscopic and microscopic scales. Therefore, we utilize the method of physical polishing to obtain polysilicon characterization samples and then the paper utilizes metallographic microscopy, scanning electron microscopy-electron backscatter diffraction technology, and aberration-corrected transmission electron microscopy technology to observe and characterize the interface region between silicon core and matrix in the deposition process of electronic-grade polycrystalline silicon, providing a full-scale characterization of the interface morphology, grain structure, and orientation distribution from macro to micro. Finally, the paper illustrates the current uncertainties regarding polycrystalline silicon. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 2010135X
- Volume :
- 14
- Issue :
- 3
- Database :
- Complementary Index
- Journal :
- Journal of Advanced Dielectrics
- Publication Type :
- Academic Journal
- Accession number :
- 178313992
- Full Text :
- https://doi.org/10.1142/S2010135X24400058