Cite
Leakage Power Attack-Resilient Design: PMOS-Reading 9T SRAM Cell.
MLA
Yang, Muyu, et al. “Leakage Power Attack-Resilient Design: PMOS-Reading 9T SRAM Cell.” Electronics (2079-9292), vol. 13, no. 13, July 2024, p. 2551. EBSCOhost, https://doi.org/10.3390/electronics13132551.
APA
Yang, M., Balasubramanian, P., Chen, K., & Oruklu, E. (2024). Leakage Power Attack-Resilient Design: PMOS-Reading 9T SRAM Cell. Electronics (2079-9292), 13(13), 2551. https://doi.org/10.3390/electronics13132551
Chicago
Yang, Muyu, Prakash Balasubramanian, Kangqi Chen, and Erdal Oruklu. 2024. “Leakage Power Attack-Resilient Design: PMOS-Reading 9T SRAM Cell.” Electronics (2079-9292) 13 (13): 2551. doi:10.3390/electronics13132551.