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Combinatorial constructions of optimal low-power error-correcting cooling codes.
- Source :
- Designs, Codes & Cryptography; Aug2024, Vol. 92 Issue 8, p2235-2252, 18p
- Publication Year :
- 2024
-
Abstract
- High temperatures have dramatic negative effects on interconnect performance. In a bus, whenever the state transitions from "0" to "1", or "0" to "1", joule heating causes the temperature to rise. A low-power error-correcting cooling (LPECC) code, introduced in Chee et al. (IEEE Trans Inf Theory 64:3062–3085, 2018), is a coding scheme which can be used to control the peak temperature, the average power consumption of on-chip buses and error-correction for the transmitted information, simultaneously. In this paper, we show upper bounds and some lower bounds of LPECC codes by some combinatorial configurations, and also present several families of optimal LPECC codes. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 09251022
- Volume :
- 92
- Issue :
- 8
- Database :
- Complementary Index
- Journal :
- Designs, Codes & Cryptography
- Publication Type :
- Academic Journal
- Accession number :
- 178655914
- Full Text :
- https://doi.org/10.1007/s10623-024-01391-0