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Simulation Environment for the Testing of Electrical Arc Fault Detection Algorithms.
- Source :
- Electronics (2079-9292); Oct2024, Vol. 13 Issue 20, p4099, 19p
- Publication Year :
- 2024
-
Abstract
- Electrical arc fault detector development requires many tests to develop and validate detection algorithms. The use of artificial intelligence or mathematical transformation requires the use of consequential datasets of current signatures corresponding to as many different situations as possible. In addition, one of the main drawbacks is that these experiments take a great deal of time and are often laborious in the laboratory. To overcome these limitations, a virtual test bench based on the modeling of a modular 230 VAC electrical circuit has been developed. The simulated network is composed of different home appliances (resistor, vacuum cleaner, dimmer, etc.) and its configurations are those of single and combined loads. The fault modeled is an electric arc, modeled by active diode switching, which can be inserted at any point of the circuit. This arc model takes into account the random variations in the restrike and arc voltage. All the appliance models are validated by comparing the frequential (harmonic distortion) and temporal (agreement index) signatures of the measured currents in real situations to those obtained by modeling. The results obtained using the model and experiment network show that the current signatures are comparable in both cases. Further, two detection algorithms are tested on those current signatures obtained by the modeling and experimentation. The results are comparable and provide identical detection thresholds. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 20799292
- Volume :
- 13
- Issue :
- 20
- Database :
- Complementary Index
- Journal :
- Electronics (2079-9292)
- Publication Type :
- Academic Journal
- Accession number :
- 180557557
- Full Text :
- https://doi.org/10.3390/electronics13204099