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GaN enhancement/depletion-mode FET logic for mixed signal applications.

Authors :
Micovic, M.
Tsen, T.
Hu, M.
Hashimoto, P.
Willadsen, P. J.
Milosavljevic, I.
Schmitz, A.
Antcliffe, M.
Zhender, D.
Moon, J. S.
Wong, W. S.
Chow, D.
Source :
Electronics Letters (Institution of Engineering & Technology); 9/15/2005, Vol. 41 Issue 19, p1081-1083, 3p
Publication Year :
2005

Abstract

The first demonstration of enhancement/depletion (E/D)-mode integrated digital circuits in GaN technology is reported. Specifically, the performance of static divide by 2 circuit implemented in direct coupled FET logic and of a 23-stage ring oscillator, implemented in super-buffered FET logic are presented. The reported E/D technology is potentially suitable for fabrication of mixed signal GaN circuits. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00135194
Volume :
41
Issue :
19
Database :
Complementary Index
Journal :
Electronics Letters (Institution of Engineering & Technology)
Publication Type :
Academic Journal
Accession number :
18528956
Full Text :
https://doi.org/10.1049/el:20052263