Optimal Intratask Dynamic Voltage- Scaling Technique and Its Practical Extensions.

MLA

Jaewon Seo, et al. “Optimal Intratask Dynamic Voltage- Scaling Technique and Its Practical Extensions.” IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, vol. 25, no. 1, Jan. 2006, pp. 47–57. EBSCOhost, https://doi.org/10.1109/TCAD.2005.853703.

APA

Jaewon Seo, Kim, T., & Joonwon Lee. (2006). Optimal Intratask Dynamic Voltage- Scaling Technique and Its Practical Extensions. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, 25(1), 47–57. https://doi.org/10.1109/TCAD.2005.853703

Chicago

Jaewon Seo, Taewhan Kim, and Joonwon Lee. 2006. “Optimal Intratask Dynamic Voltage- Scaling Technique and Its Practical Extensions.” IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems 25 (1): 47–57. doi:10.1109/TCAD.2005.853703.