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Design Methods for Binary to Decimal Converters Using Arithmetic Decompositions.
- Source :
- Journal of Multiple-Valued Logic & Soft Computing; 2007, Vol. 13 Issue 4-6, p503-520, 18p, 13 Diagrams, 2 Charts
- Publication Year :
- 2007
-
Abstract
- In digital signal processing, radixes other than two are often used for high-speed computation. In the computation for finance, decimal numbers are used instead of binary numbers. In such cases, radix converters are necessary. This paper considers design methods for binary to q-nary converters. It introduces a new design technique based on weighted-sum (WS) functions. The method computes a WS function for each digit by an LUT cascade and a binary adder, then adds adjacent digits with q-nary adders. A 16-bit binary to decimal converter is designed to show the method. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 15423980
- Volume :
- 13
- Issue :
- 4-6
- Database :
- Complementary Index
- Journal :
- Journal of Multiple-Valued Logic & Soft Computing
- Publication Type :
- Academic Journal
- Accession number :
- 27563737