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Realization of High Voltage (> 700 V) in New SOT Devices With a Compound Buried Layer.

Authors :
Xiaorong Luo
Zhaoji Li
Bo Zhang
Daping Fu
Zhan Zhan
Kaifeng Chen
Shengdong Hu
Zhengyuan Zhang
Zhicheng Feng
Bin Yan
Source :
IEEE Electron Device Letters; Dec2008, Vol. 29 Issue 12, p1395-1397, 3p, 5 Graphs
Publication Year :
2008

Abstract

A novel silicon-on-insulator (SOl) high-voltage de- vice with a compound buried layer (CBL SOl) consisting of two oxide layers and a polysilicon layer between them is proposed. Its breakdown characteristic is investigated theoretically and experimentally. Theoretically, its vertical breakdown voltage (BV) is shared by two oxide layers; furthermore, the electric field in the lower buried oxide layer of E12 is increased from about 78 to 454 V/jtm by holes collected on the bottom interface of the polysilicon. Both result in an enhanced BY. Experimentally, 762-V SO! diode is obtained. The maximal temperature of CBL SO! diode is reduced by 16.9 K because a window in the upper buried oxide layer alleviates the self-heating effect. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
07413106
Volume :
29
Issue :
12
Database :
Complementary Index
Journal :
IEEE Electron Device Letters
Publication Type :
Academic Journal
Accession number :
35718944
Full Text :
https://doi.org/10.1109/LED.2008.2007307