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Bulk and Interface effects on voltage linearity of ZrO2–SiO2 multilayered metal-insulator-metal capacitors for analog mixed-signal applications.

Authors :
Park, S. D.
Park, C.
Gilmer, D. C.
Park, H. K.
Kang, C. Y.
Lim, K. Y.
Burham, C.
Barnett, J.
Kirsch, P. D.
Tseng, H. H.
Jammy, R.
Yeom, G. Y.
Source :
Applied Physics Letters; 7/13/2009, Vol. 95 Issue 2, p022905, 3p, 4 Graphs
Publication Year :
2009

Abstract

Quadratic voltage coefficient of capacitance (VCC) for ZrO<subscript>2</subscript>–SiO<subscript>2</subscript> multilayered dielectric metal-insulator-metal capacitors depends strongly on the stacking sequence of the layered dielectrics. The quadratic VCC of an optimized SiO<subscript>2</subscript>/ZrO<subscript>2</subscript>/SiO<subscript>2</subscript> stack and ZrO<subscript>2</subscript>/SiO<subscript>2</subscript>/ZrO<subscript>2</subscript> stack were +42 and -1094 ppm/V<superscript>2</superscript>, respectively, despite the same total SiO<subscript>2</subscript> and ZrO<subscript>2</subscript> dielectric thickness in the stack. The observed difference in quadratic VCC depending on dielectric stacking sequence is explained by taking into account both the interface and bulk dielectric responses to the applied voltage. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00036951
Volume :
95
Issue :
2
Database :
Complementary Index
Journal :
Applied Physics Letters
Publication Type :
Academic Journal
Accession number :
43277345
Full Text :
https://doi.org/10.1063/1.3182856