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Folded-Accumulation LDMOST: New Power MOS Transistor With Very Low Specific On-Resistance.

Authors :
Baoxing Duan
Yintang Yang
Bo Zhang
Xufeng Hong
Source :
IEEE Electron Device Letters; Dec2009, Vol. 30 Issue 12, p1329-1331, 3p
Publication Year :
2009

Abstract

A new lateral power MOSFET structure [folded-accumulation LDMOS (FALDMOS)] is proposed, in which the silicon-substrate surface is trenched to form a folded shape from the channel to the drain electrode and the gate is extended to the drain. The majority-carrier accumulation layer is formed as the device is in ON state due to the extended gate in the drift region whose concentration is higher than that in a conventional LDMOS at the same breakdown voltage (By), resulting from the additional electric-field modulation, and an extra majority carrier is introduced on the sidewall of the trench, which reduced the on-resistance of the drift region further. In addition, the channel density is doubled because of trenching the folded channel, which reduced the channel on-resistance. It indicates by simulation that the specific on-resistance of 4.6Ω · mm<superscript>2</superscript> with a BV of 27.4 V in FALDMOS is lower than that of the previously reported lowest one. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
07413106
Volume :
30
Issue :
12
Database :
Complementary Index
Journal :
IEEE Electron Device Letters
Publication Type :
Academic Journal
Accession number :
47107193
Full Text :
https://doi.org/10.1109/LED.2009.2032338