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Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture.

Authors :
Yoon Jae Seong
Eyee Hyun Nam
Jin Hyuk Yoon
Hongseok Kim
Jin-Yong Choi
Sookwan Lee
Young Hyun Bae
Jaejin Lee
Yookun Cho
Sang Lyul Min
Source :
IEEE Transactions on Computers; Jul2010, Vol. 59 Issue 7, p905-921, 17p
Publication Year :
2010

Abstract

Flash memory solid-state disks (SSDs) are replacing hard disk drives (HDDs) in mobile computing systems because of their lower power consumption, faster random access, and greater shock resistance. We describe Hydra, a high-performance flash memory SSD architecture that translates the parallelism inherent in multiple flash memory chips into improved performance, by means of both bus-level and chip-level interleaving. Hydra has a prioritized structure of memory controllers, consisting of a single high-priority foreground unit, to deal with read requests, and multiple background units, all capable of autonomous execution of sequences of high-level flash memory operations. Hydra also employs an aggressive write buffering mechanism based on block mapping to ensure that multiple flash memory chips are used effectively, and also to expedite the processing of write requests. Performance evaluation of an FPGA implementation of the Hydra SSD architecture shows that its performance is more than 80 percent better than the best of the comparable HDDs and SSDs that we considered. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189340
Volume :
59
Issue :
7
Database :
Complementary Index
Journal :
IEEE Transactions on Computers
Publication Type :
Academic Journal
Accession number :
51197319
Full Text :
https://doi.org/10.1109/TC.2010.63