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A Built-In Self-Test (BIST) Technique for Single-Event Testing in Digital Circuits.

Authors :
Balasubramanian, Anitha
Bhuva, B. L.
Massengill, L. W.
Narasimham, B.
Shuler, R. L.
Loveless, T. D.
Holman, W. Timothy
Source :
IEEE Transactions on Nuclear Science; Dec2008 Part 1 of 2, Vol. 55 Issue 6, p3130-3135, 6p, 9 Diagrams, 2 Graphs
Publication Year :
2008

Abstract

A built-in self-test technique for testing digital logic circuits for single-events has been developed. The BIST technique can be used for single-event testing in any conventional laboratory to evaluate the circuit level response to SEs. Experimental and simulation results for multiple technology nodes show the feasibility of this approach to test circuits, with the added advantages of reduced testing time and cost. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
00189499
Volume :
55
Issue :
6
Database :
Complementary Index
Journal :
IEEE Transactions on Nuclear Science
Publication Type :
Academic Journal
Accession number :
52037561
Full Text :
https://doi.org/10.1109/TNS.2008.2006499