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A \700-\mu\ A 405-MHz All-Digital Fractional-N Frequency-Locked Loop for ISM Band Applications.
- Source :
- IEEE Transactions on Microwave Theory & Techniques; 05/01/2011, Vol. 59 Issue 5, p1319-1326, 8p
- Publication Year :
- 2011
-
Abstract
- Several wireless biomedical transceivers, including medical implants communication systems (MICSs), require ultra-low-power low-complexity frequency synthesizers. This paper presents an all-digital frequency-locked loop (ADFLL)-based frequency synthesizer with a built-in frequency-shift keying modulator for MICS and industrial–scientific–medical band applications. Unlike all-digital phase-locked loops that rely on a power-hungry time to digital converter, the proposed ADFLL employs a high-resolution single-bit \Sigma \Delta frequency discriminator in the feedback path and a noise-cancelling \Sigma \Delta phase-accumulator-based frequency controller in the reference path, achieving fractional resolution with low power consumption. The loop compensation is implemented digitally using an infinite impulse response filter followed by a digital-intensive current-steering DAC driving a ring-oscillator-based voltage-controlled oscillator. The ADFLL achieves 9.5-Hz frequency resolution, spanning the ISM 400–410-MHz band. A worst case near-integer spur of -\62 dBc and a phase noise of -\83 dBc/Hz at 300-kHz offset are measured. The ADFLL is fabricated on a \0.18-\mu\ m CMOS process, occupying a \ 0.14-mm^2 die area, with a quiescent current consumption of \700~\mu\ A. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189480
- Volume :
- 59
- Issue :
- 5
- Database :
- Complementary Index
- Journal :
- IEEE Transactions on Microwave Theory & Techniques
- Publication Type :
- Academic Journal
- Accession number :
- 60516351
- Full Text :
- https://doi.org/10.1109/TMTT.2011.2114897