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Domain Wall Shift Register-Based Reconfigurable Logic.
- Source :
- IEEE Transactions on Magnetics; Oct2011, Vol. 47 Issue 10, p2966-2969, 4p
- Publication Year :
- 2011
-
Abstract
- The current challenges of spintronic devices are the large power and long latency for magnetic switching. Current-induced domain wall (DW) motion is a new switching mechanism promising low-power, high-density, and high-speed circuits. It was first studied to build “race track” memory, which is considered as one of the most emerging technologies for future stand-alone memory. Based on the 3-D hybrid integration above CMOS circuits and using magnetic tunnel junction (MTJ) as the write/read heads, DW motion can be advantageously extended to logic and embedded memory applications. In this paper, we present the first DW shift register-based lookup-table circuit to build reconfigurable logic, which may nearly halve the die area compared with conventional SRAM-LUT by sharing a number of subcircuits and suggest some new functions such as multicontext configuration and run-time reconfiguration for further performance improvement. By using a DW electrical model and CMOS 65-nm design kit, its performances such as low power and high computing/reconfiguration speed have been simulated or calculated. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189464
- Volume :
- 47
- Issue :
- 10
- Database :
- Complementary Index
- Journal :
- IEEE Transactions on Magnetics
- Publication Type :
- Academic Journal
- Accession number :
- 65934100
- Full Text :
- https://doi.org/10.1109/TMAG.2011.2158294