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A Fully-Integrated 3-Level DC-DC Converter for Nanosecond-Scale DVFS.
- Source :
- IEEE Journal of Solid-State Circuits; Jan2012, Vol. 47 Issue 1, p206-219, 14p
- Publication Year :
- 2012
-
Abstract
- On-chip DC-DC converters have the potential to offer fine-grain power management in modern chip-multiprocessors. This paper presents a fully integrated 3-level DC-DC converter, a hybrid of buck and switched-capacitor converters, implemented in 130 nm CMOS technology. The 3-level converter enables smaller inductors (1 nH) than a buck, while generating a wide range of output voltages compared to a 1/2 mode switched-capacitor converter. The test-chip prototype delivers up to 0.85 A load current while generating output voltages from 0.4 to 1.4 V from a 2.4 V input supply. It achieves 77% peak efficiency at power density of 0.1 W/mm^2 and 63% efficiency at maximum power density of 0.3 W/mm^2. The converter scales output voltage from 0.4 V to 1.4 V (or vice-versa) within 20 ns at a constant 450 mA load current. A shunt regulator reduces peak-to-peak voltage noise from 0.27 V to 0.19 V under pseudo-randomly fluctuating load currents. Using simulations across a wide range of design parameters, the paper compares conversion efficiencies of the 3-level, buck and switched-capacitor converters. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISSN :
- 00189200
- Volume :
- 47
- Issue :
- 1
- Database :
- Complementary Index
- Journal :
- IEEE Journal of Solid-State Circuits
- Publication Type :
- Academic Journal
- Accession number :
- 70577543
- Full Text :
- https://doi.org/10.1109/JSSC.2011.2169309