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A Dither-Less All Digital PLL for Cellular Transmitters.

Authors :
Vercesi, Luca
Fanori, Luca
De Bernardinis, Fernando
Liscidini, Antonio
Castello, Rinaldo
Source :
IEEE Journal of Solid-State Circuits; Aug2012, Vol. 47 Issue 8, p1908-1920, 13p
Publication Year :
2012

Abstract

An all-digital frequency synthesizer for cellular transmitter is presented. Low phase-noise is achieved both in-band and out-of-band exploiting a 2-dimensional Vernier time-to-digital converter and a dither-less digitally controlled oscillator. These building blocks heavily rely on digital calibration techniques to precisely and efficiently implement two-point modulation and spur cancellation in the presence of implementation impairments. The presented prototype shows an in-band phase noise of -108 dBc/Hz, an out-of-band phase noise of -160 dBc/Hz @20 MHz and in-band fractional spurs below -50 dBc. These results are obtained for an output carrier of 1.8 GHz, a reference clock of 26 MHz, with a power consumption of 41.6 mW. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189200
Volume :
47
Issue :
8
Database :
Complementary Index
Journal :
IEEE Journal of Solid-State Circuits
Publication Type :
Academic Journal
Accession number :
78146499
Full Text :
https://doi.org/10.1109/JSSC.2012.2197130