Cite
Aggressively scaled high-k last metal gate stack with low variability for 20nm logic high performance and low power applications.
MLA
Hyun, S., et al. “Aggressively Scaled High-k Last Metal Gate Stack with Low Variability for 20nm Logic High Performance and Low Power Applications.” 2011 Symposium on VLSI Technology (VLSIT), Jan. 2011, pp. 32–33. EBSCOhost, widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edb&AN=80367811&authtype=sso&custid=ns315887.
APA
Hyun, S., Han, J., Park, H., Na, H., Son, H. J., Lee, H. Y., Hong, H., Lee, H., Song, J., Kim, J. J., Lee, J., Jeong, W. C., Cho, H. J., Seo, K. I., Kim, D. W., Sim, S. P., Kang, S. B., Sohn, D. K., Siyoung Choi, & Kang, H. (2011). Aggressively scaled high-k last metal gate stack with low variability for 20nm logic high performance and low power applications. 2011 Symposium on VLSI Technology (VLSIT), 32–33.
Chicago
Hyun, S., J. Han, H. Park, H. Na, H.J. Son, H.Y. Lee, H. Hong, et al. 2011. “Aggressively Scaled High-k Last Metal Gate Stack with Low Variability for 20nm Logic High Performance and Low Power Applications.” 2011 Symposium on VLSI Technology (VLSIT), January, 32–33. http://widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edb&AN=80367811&authtype=sso&custid=ns315887.