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Modeling yield of carbon-nanotube/silicon-nanowire FET-based nanoarray architecture with h-hot addressing scheme.

Authors :
Shanrui Zhang
Minsu Choi
Park, N.
Source :
Proceedings of the 19th IEEE International Symposium on Defect & Fault Tolerance in VLSI Systems, 2004. DFT 2004; 2004, p356-364, 9p
Publication Year :
2004

Details

Language :
English
ISBNs :
9780769522418
Database :
Complementary Index
Journal :
Proceedings of the 19th IEEE International Symposium on Defect & Fault Tolerance in VLSI Systems, 2004. DFT 2004
Publication Type :
Conference
Accession number :
80762622
Full Text :
https://doi.org/10.1109/DFTVS.2004.1347860