An efficient pre-layout on-chip inductance noise modeling tool for bus design.

Authors :: Mazumder, M.
Bohnke, R.
Husain, A.
Grannes, D.
Chiprout, E.
Lei Sun
Menon, S.
Eells, J.
Changhong Dai
Source :: Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710); 2003, p317-320, 4p
Publication Year :: 2003

Language :: English
ISBNs :: 9780780381285
Database :: Complementary Index
Journal :: Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)
Publication Type :: Conference
Accession number :: 81131394
Full Text :: https://doi.org/10.1109/EPEP.2003.1250058