A fast hardware/software co-verification method for systern-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication.

Details

Language :

English

ISBNs :

9781511838283

Database :

Complementary Index

Journal :

Proceedings 41st Design Automation Conference, 2004

Publication Type :

Conference

Accession number :

81262667

Full Text :

https://doi.org/10.1109/DAC.2004.240325