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Intrinsic gate delay and energy-delay product in junctionless nanowire transistors.
- Source :
- 2012 13th International Conference on Ultimate Integration on Silicon (ULIS); 1/ 1/2012, p125-128, 4p
- Publication Year :
- 2012
-
Abstract
- In this paper we investigate two important device metrics, intrinsic gate-delay and energy-delay product of triple-gate junctionless nanowire transistors (JNTs) with gate lengths from 22 nm down to 15 nm, for different channel doping concentrations and compare them with those of triple-gate inversion-mode (EVI) nanowire field-effect transistors. Our study shows although intrinsic gate-delay is larger in junctionless devices compared to those of EVI devices, since the switching energy is smaller in JNTs, energy-delay product is almost identical for both junctionless and IM devices. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISBNs :
- 9781467301916
- Database :
- Complementary Index
- Journal :
- 2012 13th International Conference on Ultimate Integration on Silicon (ULIS)
- Publication Type :
- Conference
- Accession number :
- 86492805
- Full Text :
- https://doi.org/10.1109/ULIS.2012.6193373