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An integrate-and-dump receiver for high dynamic range photonic analog-to-digital conversion.
- Source :
- 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems; 1/ 1/2012, p155-158, 4p
- Publication Year :
- 2012
-
Abstract
- A high-linearity integrate-and-dump circuit is proposed for the electrical interface to a photonic sampling system. The integrate-and-dump receiver operates at 2 GS/s with a 500ps period for integration, hold, and reset. Better than 7.5 ENOB is measured with a sinewave input. The integrate-and-dump receiver is fabricated in a 120nm SiGe BiCMOS technology with a core current consumption of 84 mA from a 5 V supply. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISBNs :
- 9781457713170
- Database :
- Complementary Index
- Journal :
- 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
- Publication Type :
- Conference
- Accession number :
- 86536103
- Full Text :
- https://doi.org/10.1109/SiRF.2012.6160158