Comparing FICDM and wafer-level CDM test methods: Apples to Oranges?

The on-chip stresses induced by FICDM, WCDM2, CC-TLP, and VF-TLP are compared on the basis of voltage monitor readings and IC functional failures. In general, core circuit failures induced by FICDM are replicated on the wafer level. Package-related parasitics increase the FICDM current rise-time at an I/O pad relative to that measured externally, causing miscorrelation with wafer-level testers. [ABSTRACT FROM PUBLISHER]