A VPM (Virtual Pipelined Memory) architecture for a fast row-cycle DRAM.

MLA

Chi-Weon Yoon, et al. “A VPM (Virtual Pipelined Memory) Architecture for a Fast Row-Cycle DRAM.” AP-ASIC’99 First IEEE Asia Pacific Conference on ASICs (Cat No99EX360), Jan. 1999, pp. 388–91. EBSCOhost, https://doi.org/10.1109/APASIC.1999.824115.

APA

Chi-Weon Yoon, Yon-Kyun Im, Seon-Ho Han, Hoi-Jun Yoo, & Tae-Sung Jung. (1999). A VPM (Virtual Pipelined Memory) architecture for a fast row-cycle DRAM. AP-ASIC’99 First IEEE Asia Pacific Conference on ASICs (Cat No99EX360), 388–391. https://doi.org/10.1109/APASIC.1999.824115

Chicago

Chi-Weon Yoon, Yon-Kyun Im, Seon-Ho Han, Hoi-Jun Yoo, and Tae-Sung Jung. 1999. “A VPM (Virtual Pipelined Memory) Architecture for a Fast Row-Cycle DRAM.” AP-ASIC’99 First IEEE Asia Pacific Conference on ASICs (Cat No99EX360), January, 388–91. doi:10.1109/APASIC.1999.824115.