A fast synchronous pipelined DRAM (SP-DRAM) architecture with SRAM buffers.

Details

Language :

English

ISBNs :

9780780357273

Database :

Complementary Index

Journal :

ICVC '99 6th International Conference on VLSI & CAD (Cat No99EX361)

Publication Type :

Conference

Accession number :

92402675

Full Text :

https://doi.org/10.1109/ICVC.1999.820907