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A novel optimization method for reversible logic circuit minimization.
- Source :
- 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI); 2013, p182-187, 6p
- Publication Year :
- 2013
Details
- Language :
- English
- ISBNs :
- 9781479913312
- Database :
- Complementary Index
- Journal :
- 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
- Publication Type :
- Conference
- Accession number :
- 92917797
- Full Text :
- https://doi.org/10.1109/ISVLSI.2013.6654656