A Novel Silicon-on-Insulator Super-Junction Lateral-Double-Diffused Metal-Oxide-Semiconductor Transistor with T-Dual Dielectric Buried Layers.

A novel silicon-on-insulator (SOI) high-voltage device of super-junction (SJ) lateral-double-diffused metal-oxide-semiconductor transistors (LDMOSTs) with T-dual dielectric buried layers (T-DBLs) is presented. The T-DBLs are formed by the first T-shaped dielectric layer and the second dielectric layer. A lot of holes are accumulated on the top interface of the second dielectric layer, which compensates for the charge imbalance of the surface N and P pillars, thus the substrate-assisted depletion (SAD) effect is eliminated in the new device. The electric field of the second dielectric buried layer, E₁₂, is enhanced by the interface charges, and the breakdown voltage V_breakdown is increased. E₁₂ = 515 V/μm is obtained in the T-DBL SOI SJ. The V_breakdown of the new device is increased from 124 V of the conventional SOI SJ to 302 V with a 15 μm length drift region. The specific on-resistance (R_on,sp) of the T-DBL SOI SJ is only 0.00865 Ω·cm² and the FOM (FOM = V²_breakdown/R_on,sp) is 10.54 MW/cm². [ABSTRACT FROM AUTHOR]