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A low specific on-resistance SOI LDMOS with a novel junction field plate.
- Source :
- Chinese Physics B; Jul2014, Vol. 23 Issue 7, p1-1, 1p
- Publication Year :
- 2014
-
Abstract
- A low specific on-resistance SOI LDMOS with a novel junction field plate (JFP) is proposed and investigated theoretically. The most significant feature of the JFP LDMOS is a PP—N junction field plate instead of a metal field plate. The unique structure not only yields charge compensation between the JFP and the drift region, but also modulates the surface electric field. In addition, a trench gate extends to the buried oxide layer (BOX) and thus widens the vertical conduction area. As a result, the breakdown voltage (BV) is improved and the specific on-resistance (R<subscript>on,sp</subscript>) is decreased significantly. It is demonstrated that the BV of 306 V and the R<subscript>on,sp</subscript> of 7.43 mΩ·cm<superscript>2</superscript> are obtained for the JFP LDMOS. Compared with those of the conventional LDMOS with the same dimensional parameters, the BV is improved by 34.8%, and the R<subscript>on,sp</subscript> is decreased by 56.6% simultaneously. The proposed JFP LDMOS exhibits significant superiority in terms of the trade-off between BV and R<subscript>on,sp</subscript>. The novel JFP technique offers an alternative technique to achieve high blocking voltage and large current capacity for power devices. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 16741056
- Volume :
- 23
- Issue :
- 7
- Database :
- Complementary Index
- Journal :
- Chinese Physics B
- Publication Type :
- Academic Journal
- Accession number :
- 96918217
- Full Text :
- https://doi.org/10.1088/1674-1056/23/7/077306