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Accelerating the neural network controller embedded implementation on FPGA with novel dropout techniques for a solar inverter.

Authors :
Sturtz, Jordan
Surendranath, Kushal Kalyan Devalampeta
Sam, Maxwell
Fu, Xingang
Hingu, Chanakya Dinesh
Challoo, Rajab
Qingge, Letu
Source :
Pervasive & Mobile Computing; Nov2024, Vol. 104, pN.PAG-N.PAG, 1p
Publication Year :
2024

Abstract

Accelerating neural network (NN) controllers is important for improving the performance, efficiency, scalability, and reliability of real-time systems, particularly in resource-constrained embedded systems. This paper introduces a novel weight-dropout method for training neural network controllers in real-time closed-loop systems, aimed at accelerating the embedded implementation for solar inverters. The core idea is to eliminate small-magnitude weights during training, thereby reducing the number of necessary connections while ensuring the network's convergence. To maintain convergence, only non-diagonal elements of the weight matrices were dropped. This dropout technique was integrated into the Levenberg–Marquardt and Forward Accumulation Through Time algorithms, resulting in more efficient training for trajectory tracking. We executed the proposed training algorithm with dropout on the AWS cloud, observing a performance increase of approximately four times compared to local execution. Furthermore, implementing the neural network controller on the Intel Cyclone V Field Programmable Gate Array (FPGA) demonstrates significant improvements in computational and resource efficiency due to the proposed dropout technique leading to sparse weight matrices. This optimization enhances the suitability of the neural network controller for embedded environments. In comparison to Sturtz et al. (2023), which dropped 11 weights, our approach eliminated 18 weights, significantly boosting resource efficiency. This resulted in a 16.40% reduction in Adaptive Logic Modules (ALMs), decreasing the count to 47,426.5. Combinational Look-Up Tables (LUTs) and dedicated logic registers saw reductions of 17.80% and 15.55%, respectively. However, the impact on block memory bits is minimal, showing only a 1% improvement, indicating that memory resources are less affected by weight dropout. In contrast, the usage of Memory 10 Kilobits (MK10s) dropped from 97 to 87, marking a 10% improvement. We also propose an adaptive dropout technique to further improve the previous results. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
15741192
Volume :
104
Database :
Supplemental Index
Journal :
Pervasive & Mobile Computing
Publication Type :
Academic Journal
Accession number :
179597997
Full Text :
https://doi.org/10.1016/j.pmcj.2024.101975