Low-Frequency Noise and Border Traps in Irradiated nMOS and pMOS Bulk Si FinFETs With SiO2/HfO2 Gate Dielectrics

The temperature dependence of low-frequency noise is investigated from 80 to 320 K for nMOS and pMOS bulk Si FinFETs with SiO2/HfO2 gate dielectrics. Both types of devices show excellent stability during bias-temperature stress and high total-ionizing dose (TID) irradiation. nMOSFET 1/<inline-formula> <tex-math notation="LaTeX">$f$ </tex-math></inline-formula> noise generally decreases as measuring temperature increases, with three prominent individual defect-related peaks. These peaks in noise magnitude are most likely due to hydrogen shuttling near the interface and/or O vacancies in the HfO2. In contrast, the 1/<inline-formula> <tex-math notation="LaTeX">$f$ </tex-math></inline-formula> noise in pMOSFETs generally increases with increasing temperature without prominent peaks in noise magnitude. The gate-voltage dependence of low-frequency noise also is evaluated at different temperatures for both device types. Results confirm that the nMOS devices have effective border-trap energy distributions that are nonuniform and generally increase toward midgap, and the pMOS devices have more uniform defect-energy distributions that increase monotonically toward the valence band.