Exploiting the Single-Symbol LLR Variation to Accelerate LDPC Decoding for 3-D nand Flash Memory

MLA

Li, Yingge, et al. “Exploiting the Single-Symbol LLR Variation to Accelerate LDPC Decoding for 3-D Nand Flash Memory.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 12, Dec. 2023, pp. 5146–50. EBSCOhost, https://doi.org/10.1109/TCAD.2023.3297070.

APA

Li, Y., Han, G., Liu, C., Zhang, M., & Wu, F. (2023). Exploiting the Single-Symbol LLR Variation to Accelerate LDPC Decoding for 3-D nand Flash Memory. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 42(12), 5146–5150. https://doi.org/10.1109/TCAD.2023.3297070

Chicago

Li, Yingge, Guojun Han, Chang Liu, Meng Zhang, and Fei Wu. 2023. “Exploiting the Single-Symbol LLR Variation to Accelerate LDPC Decoding for 3-D Nand Flash Memory.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 42 (12): 5146–50. doi:10.1109/TCAD.2023.3297070.