Investigation on Degradation of 1200-V Planar and Trench SiC MOSFET Under Surge Current Stress of Body Diode

When silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) operate in the third quadrant, the surge current under extreme operating conditions hinders the body diode from replacing the external SiC Schottky barrier diode (SBD) as the freewheeling diode. Primarily, the channel activation of SiC MOSFET at <inline-formula> <tex-math notation="LaTeX">${V}_{\text {GS}}$ </tex-math></inline-formula> = 0 V is attributed to the body effect and the current conduction pathway within the p-well. Following this, an in-depth surge reliability analysis is conducted, contingent upon the varying structures of SiC MOSFET. The experimental result indicates that the surge capability of double-trench SiC MOSFET is inferior compared with planar SiC MOSFET and asymmetric SiC MOSFET. The impurity defects by the deep groove process and the design of the terminal layout are the critical constraints to the reliability of D-MOSFET under surge current stress. The interplay of static parameter degradation and scanning electron microscopy (SEM) investigations pinpoints two primary factors accountable for device failure. On the one hand, the gate and source terminals are short circuited due to the melting of metal electrodes caused by substantial surge currents. On the other hand, severe thermomechanical strains, incited by elevated thermal stresses attributable to surge currents, provoke substrate fissuring, and culminating in comprehensive short circuits bridging the gate, source, and drain terminals.