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Bypass Resistive RAM With Interface Switching-Based Resistive RAM and InGaZnO Bypass Transistor for V-NAND Applications

Authors :
Han, Geonhui
Lee, Kyumin
Kim, Dongmin
Seo, Yoori
Lee, Jinwoo
Choi, Jinmyung
Ahn, Dongho
Oh, Sechung
Hwang, Hyunsang
Source :
IEEE Electron Device Letters; February 2024, Vol. 45 Issue: 2 p192-195, 4p
Publication Year :
2024

Abstract

We report a bypass resistive random-access memory (B-RRAM), which combines interface switching-based RRAM and an IGZO transistor, providing high compatibility with a vertical NAND (V-NAND) structure for high-density memory. The analog switching properties of the WOx resistive switching (RS) layer for the memory and the low off-state leakage current of the IGZO transistor (Tr) were utilized for the selector device. By utilizing the bypass reading between the RS and Tr layer, B-RRAM exhibits the favorable memory characteristics with a low operation voltage (~ 2 V), outstanding multibit operation (> 3 bits), and robust endurance (<inline-formula> <tex-math notation="LaTeX">$\sim ~10^{{6}}{)}$ </tex-math></inline-formula>. Furthermore, the B-RRAM also demonstrated a high on/off (<inline-formula> <tex-math notation="LaTeX">$ > 10^{{6}}{)}$ </tex-math></inline-formula> ratio and reasonable retention characteristics owing to the synergistic effects of RS and Tr layers. These results suggest that the B-RRAM has promising potential as a replacement for V-NAND flash memory.

Details

Language :
English
ISSN :
07413106 and 15580563
Volume :
45
Issue :
2
Database :
Supplemental Index
Journal :
IEEE Electron Device Letters
Publication Type :
Periodical
Accession number :
ejs65364524
Full Text :
https://doi.org/10.1109/LED.2023.3340176